1. Field
The present invention relates to a semiconductor device configured to have recesses, such as trenches, which are formed on a semiconductor substrate and filled with an insulating film.
2. Related Art
An insulating film is used to fill a recess such as an element isolation trench formed by a shallow trench isolation (STI) process or an interwiring trench in a process of fabricating a semiconductor device. Known filling methods include a thermal chemical vapor deposition (CVD) method, a plasma-enhanced CVD method, a coating method and the like. A width of the recess has been reduced with progress in microstructurization of semiconductor devices. When the recess having a width of not more than 50 nm is filled with a single film by any one of the foregoing filling methods, it is difficult to achieve a balance between a filling characteristic and film characteristics affecting the device structure and properties, such as film stress or drop of breakdown voltage.
The following method has been proposed to overcome the above-described problem in the case of semiconductor memory devices, for example. In the proposed method, a coating film having a better filling characteristic is used in a region where memory cells and the like are formed at a minimum pitch. A combination of the coating film and a CVD film having a better film quality is used in a region where the recess width is larger, for example, a peripheral circuit region.
Japanese Patent Application Publication JP-A-2006-339446 discloses one of the above-described methods, for example. In the disclosed method, an insulating film is formed on an entire surface of a semiconductor substrate formed with element isolation trenches, by the plasma-enhanced CVD method so that voids are formed in the element isolation trenches in the region where memory cells and the like are formed at a minimum pitch and further so that the insulating film covers the bottom and sides of each trench having a larger opening width than the memory cells in the peripheral circuit region. Thereafter, the upper surface of the peripheral circuit region is covered by a resist, and the voids formed in the respective element isolation trenches in the memory cell part are exposed by a dry etching process. Subsequently, the resist is removed and the voids are filled by respective insulating films by the coating method.
However, the above-described method results in the following defect. That is, structure portions have higher aspect ratios than the recesses with further progress in the microstructurization. The structure portions include elements before the filling of recesses with the insulating films and wiring. Moreover, the mechanical strength of the structure portions is reduced since the structure portions have respective small widths. Accordingly, employment of the above-described method results in the following defects: elements, wiring and the like are deformed or broken by an external force such as surface tension of chemical used in an aqueous cleaning process after the forming of element isolation trenches or wiring trenches or stress of a coating film filling the element isolation trench or interwiring space.